Large Package MOSFET Driver Circuit

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Large Package MOSFET Driver Circuit

First of all, the MOSFET type and structure, MOSFET is a FET (another is JFET), can be manufactured into enhanced or depletion type, P-channel or N-channel a total of four types, but the actual application of only enhanced N-channel MOSFETs and enhanced P-channel MOSFETs, so usually referred to as the NMOSFET, or PMOSFET refers to the So usually mentioned NMOSFET, or PMOSFET refers to these two kinds. For these two types of enhanced MOSFETs, NMOSFETs are more commonly used because of their low on-resistance and ease of manufacture. Therefore, NMOSFETs are generally used in switching power supply and motor drive applications, and the following introduction also focuses on NMOSFETs. parasitic capacitance exists between the three pins of the MOSFET, which is not needed, but rather due to the limitations of the manufacturing process. The presence of parasitic capacitance makes it a bit tricky to design or select a driver circuit. There is a parasitic diode between the drain and the source. This is called the body diode and is important in driving inductive loads such as motors. By the way, the body diode is only present in individual MOSFETs and is usually not present inside an IC chip.

 

  

 

Now the MOSFET drive low-voltage applications, when the use of 5V power supply, this time if you use the traditional totem pole structure, due to the transistor be about 0.7V voltage drop, resulting in the actual final added to the gate on the voltage is only 4.3 V. At this time, we choose the nominal gate voltage of 4.5V of the MOSFET on the existence of certain risks. The same problem occurs in the use of 3V or other low-voltage power supply occasions. Dual voltage is used in some control circuits where the logic section uses a typical 5V or 3.3V digital voltage and the power section uses 12V or even higher. The two voltages are connected using a common ground. This puts a requirement to use a circuit that allows the low voltage side to effectively control the MOSFET on the high voltage side, while the MOSFET on the high voltage side will face the same problems mentioned in 1 and 2.

 

In all three cases, the totem pole structure cannot meet the output requirements, and many off-the-shelf MOSFET driver ICs do not seem to include a gate voltage limiting structure. The input voltage is not a fixed value, it varies with time or other factors. This variation causes the drive voltage provided to the MOSFET by the PWM circuit to be unstable. In order to make the MOSFET safe from high gate voltages, many MOSFETs have built-in voltage regulators to forcefully limit the amplitude of the gate voltage. In this case, when the drive voltage provided more than the voltage regulator, it will cause a large static power consumption at the same time, if you simply use the principle of resistor voltage divider to reduce the gate voltage, there will be a relatively high input voltage, the MOSFET works well, while the input voltage is reduced when the gate voltage is insufficient to cause a less than complete conduction, thereby increasing power consumption.

 

Relatively common circuit here only for the NMOSFET driver circuit to do a simple analysis: Vl and Vh are the low-end and high-end power supply, the two voltages can be the same, but Vl should not exceed the Vh. Q1 and Q2 form an inverted totem pole, used to realize the isolation, and at the same time to ensure that the two driver tube Q3 and Q4 will not be the same time conduction. R2 and R3 provide a PWM voltage R2 and R3 provide the PWM voltage reference, by changing this reference, you can let the circuit work in the PWM signal waveform is relatively steep and straight position. Q3 and Q4 are used to provide the drive current, due to the on-time, Q3 and Q4 relative to the Vh and GND are only a minimum of a Vce voltage drop, this voltage drop is usually only 0.3V or so, much lower than 0.7V Vce R5 and R6 are the feedback resistors, used for gate R5 and R6 are feedback resistors used to sample the gate voltage, which is then passed through Q5 to generate a strong negative feedback on the bases of Q1 and Q2, thus limiting the gate voltage to a finite value. This value can be adjusted by R5 and R6. Finally, R1 provides the limitation of the base current to Q3 and Q4, and R4 provides the limitation of the gate current to the MOSFETs, which is the limitation of the Ice of Q3Q4. An acceleration capacitor can be connected in parallel above R4 if necessary.


Post time: Apr-21-2024