VDSS Maximum Drain-Source Voltage
With the gate source shorted, the drain-source voltage rating (VDSS) is the maximum voltage that can be applied to the drain-source without avalanche breakdown. Depending on the temperature, the actual avalanche breakdown voltage may be lower than the rated VDSS. For a detailed description of V(BR)DSS, see Electrostatic
For a detailed description of V(BR)DSS, see Electrostatic Characteristics.
VGS Maximum Gate Source Voltage
The VGS voltage rating is the maximum voltage that can be applied between the gate source poles. The main purpose of setting this voltage rating is to prevent damage to the gate oxide caused by excessive voltage. The actual voltage that the gate oxide can withstand is much higher than the rated voltage, but will vary with the manufacturing process.
The actual gate oxide can withstand much higher voltages than the rated voltage, but this will vary with the manufacturing process, so keeping the VGS within the rated voltage will ensure the reliability of the application.
ID - Continuous Leakage Current
ID is defined as the maximum allowable continuous DC current at the maximum rated junction temperature, TJ(max), and tube surface temperature of 25°C or higher. This parameter is a function of the rated thermal resistance between the junction and the case, RθJC, and the case temperature:
Switching losses are not included in the ID and it is difficult to maintain the tube surface temperature at 25°C (Tcase) for practical use. Therefore, the actual switching current in hard-switching applications is usually less than half of the ID rating @ TC = 25°C, usually in the range of 1/3 to 1/4. complementary.
Additionally, the ID at a specific temperature can be estimated if thermal resistance JA is used, which is a more realistic value.
IDM - Impulse Drain Current
This parameter reflects the amount of pulsed current the device can handle, which is much higher than continuous DC current. The purpose of defining IDM is: the ohmic region of the line. For a certain gate-source voltage, the MOSFET conducts with a maximum drain current present
current. As shown in the figure, for a given gate-source voltage, if the operating point is located in the linear region, an increase in drain current raises the drain-source voltage, which increases the conduction losses. Prolonged operation at high power will result in device failure. For this reason
Therefore, the nominal IDM needs to be set below the region at typical gate drive voltages. The cutoff point of the region is at the intersection of Vgs and the curve.
Therefore, an upper current density limit needs to be set to prevent the chip from getting too hot and burning out. This is essentially to prevent excessive current flow through the package leads, since in some cases the "weakest connection" on the entire chip is not the chip, but the package leads.
Considering the limitations of thermal effects on the IDM, the temperature increase is dependent on the pulse width, the time interval between pulses, the heat dissipation, the RDS(on), and the waveform and amplitude of the pulse current. Simply satisfying that the pulse current does not exceed the IDM limit does not guarantee that the junction temperature
does not exceed the maximum allowable value. The junction temperature under pulsed current can be estimated by referring to the discussion of transient thermal resistance in Thermal and Mechanical Properties.
PD - Total Allowable Channel Power Dissipation
Total Allowable Channel Power Dissipation calibrates the maximum power dissipation that can be dissipated by the device and can be expressed as a function of the maximum junction temperature and thermal resistance at a case temperature of 25°C.
TJ, TSTG - Operating and Storage Ambient Temperature Range
These two parameters calibrate the junction temperature range allowed by the device's operating and storage environments. This temperature range is set to meet the minimum operating life of the device. Ensuring that the device operates within this temperature range will greatly extend its operating life.
EAS-Single Pulse Avalanche Breakdown Energy
If the voltage overshoot (usually due to leakage current and stray inductance) does not exceed the breakdown voltage, the device will not undergo avalanche breakdown and therefore does not need the ability to dissipate avalanche breakdown. The avalanche breakdown energy calibrates the transient overshoot that the device can tolerate.
Avalanche breakdown energy defines the safe value of the transient overshoot voltage that a device can tolerate, and is dependent on the amount of energy that needs to be dissipated for avalanche breakdown to occur.
A device that defines an avalanche breakdown energy rating usually also defines an EAS rating, which is similar in meaning to the UIS rating, and defines how much reverse avalanche breakdown energy the device can safely absorb.
L is the inductance value and iD is the peak current flowing in the inductor, which is abruptly converted to drain current in the measurement device. The voltage generated across the inductor exceeds the MOSFET breakdown voltage and will result in avalanche breakdown. When avalanche breakdown occurs, the current in the inductor will flow through the MOSFET device even though the MOSFET is off. The energy stored in the inductor is similar to the energy stored in the stray inductor and dissipated by the MOSFET.
When MOSFETs are connected in parallel, the breakdown voltages are hardly identical between devices. What usually happens is that one device is the first to experience avalanche breakdown and all subsequent avalanche breakdown currents (energy) flow through that device.
EAR - Energy of Repeating Avalanche
The energy of repetitive avalanche has become an "industry standard", but without setting the frequency, other losses and the amount of cooling, this parameter has no meaning. The heat dissipation (cooling) condition often governs the repetitive avalanche energy. It is also difficult to predict the level of energy generated by avalanche breakdown.
It is also difficult to predict the level of energy generated by avalanche breakdown.
The real meaning of the EAR rating is to calibrate the repeated avalanche breakdown energy that the device can withstand. This definition presupposes that there is no limitation on frequency so that the device does not overheat, which is realistic for any device where avalanche breakdown may occur.
The It is a good idea to measure the temperature of the device in operation or heat sink to see if the MOSFET device is overheating during the verification of the device design, especially for devices where avalanche breakdown is likely to occur.
IAR - Avalanche Breakdown Current
For some devices, the tendency of the current set edge on the chip during avalanche breakdown requires that the avalanche current IAR be limited. In this way, the avalanche current becomes the "fine print" of the avalanche breakdown energy specification; it reveals the true capability of the device.
Part II Static Electrical Characterization
V(BR)DSS: Drain-Source Breakdown Voltage (Destruction Voltage)
V(BR)DSS (sometimes called VBDSS) is the drain-source voltage at which the current flowing through the drain reaches a specific value at a specific temperature and with the gate source shorted. The drain-source voltage in this case is the avalanche breakdown voltage.
V(BR)DSS is a positive temperature coefficient, and at low temperatures V(BR)DSS is less than the maximum rating of the drain-source voltage at 25°C. At -50°C, V(BR)DSS is less than the maximum rating of the drain-source voltage at -50°C. At -50°C, V(BR)DSS is approximately 90% of the maximum drain-source voltage rating at 25°C.
VGS(th), VGS(off): Threshold voltage
VGS(th) is the voltage at which the added gate source voltage can cause the drain to begin to have current, or the current to disappear when the MOSFET is turned off, and the conditions for testing (drain current, drain source voltage, junction temperature) are also specified. Normally, all MOS gate devices have different
threshold voltages will be different. Therefore, the range of variation of VGS(th) is specified.VGS(th) is a negative temperature coefficient, when the temperature rises, the MOSFET will turn on at a relatively low gate source voltage.
RDS(on): On-resistance
RDS(on) is the drain-source resistance measured at a specific drain current (usually half of the ID current), gate-source voltage, and 25°C. The RDS(on) is the drain-source resistance measured at a specific drain current (usually half of the ID current), gate-source voltage, and 25°C.
IDSS: zero gate voltage drain current
IDSS is the leakage current between the drain and source at a specific drain-source voltage when the gate-source voltage is zero. Since leakage current increases with temperature, IDSS is specified at both room and high temperatures. The power dissipation due to leakage current can be calculated by multiplying the IDSS by the voltage between the drain sources, which is usually negligible.
IGSS - Gate Source Leakage Current
IGSS is the leakage current flowing through the gate at a specific gate source voltage.
Part III Dynamic Electrical Characteristics
Ciss : Input capacitance
The capacitance between the gate and the source, measured with an AC signal by shorting the drain to the source, is the input capacitance; Ciss is formed by connecting the gate drain capacitance, Cgd, and the gate source capacitance, Cgs, in parallel, or Ciss = Cgs + Cgd. The device is turned on when the input capacitance is charged to a threshold voltage, and is turned off when it is discharged to a certain value. Therefore, the driver circuit and Ciss have a direct impact on the turn-on and turn-off delay of the device.
Coss : Output capacitance
The output capacitance is the capacitance between the drain and the source measured with an AC signal when the gate source is shorted, Coss is formed by paralleling the drain-source capacitance Cds and the gate-drain capacitance Cgd, or Coss = Cds + Cgd. For soft-switching applications, Coss is very important because it may cause resonance in the circuit.
Crss : Reverse Transfer Capacitance
The capacitance measured between the drain and gate with the source grounded is the reverse transfer capacitance. The reverse transfer capacitance is equivalent to the gate drain capacitance, Cres = Cgd, and is often called the Miller capacitance, which is one of the most important parameters for the rise and fall times of a switch.
It is an important parameter for the switching rise and fall times, and also affects the turn-off delay time. The capacitance decreases as the drain voltage increases, especially the output capacitance and the reverse transfer capacitance.
Qgs, Qgd, and Qg: Gate Charge
The gate charge value reflects the charge stored on the capacitor between the terminals. Since the charge on the capacitor changes with the voltage at the instant of switching, the effect of gate charge is often considered when designing gate driver circuits.
Qgs is the charge from 0 to the first inflection point, Qgd is the portion from the first to the second inflection point (also called the "Miller" charge), and Qg is the portion from 0 to the point where VGS equals a specific drive voltage.
Changes in leakage current and leakage source voltage have a relatively small effect on the gate charge value, and the gate charge does not change with temperature. The test conditions are specified. A graph of gate charge is shown in the data sheet, including the corresponding gate charge variation curves for fixed leakage current and varying leakage source voltage.
The corresponding gate charge variation curves for fixed drain current and varying drain source voltage are included in the datasheets. In the graph, the plateau voltage VGS(pl) increases less with increasing current (and decreases with decreasing current). The plateau voltage is also proportional to the threshold voltage, so a different threshold voltage will produce a different plateau voltage.
voltage.
The following diagram is more detailed and applied:
td(on) : on-time delay time
The on-time delay time is the time from when the gate source voltage rises to 10% of the gate drive voltage to when the leakage current rises to 10% of the specified current.
td(off) : Off delay time
The turn-off delay time is the time elapsed from when the gate source voltage drops to 90% of the gate drive voltage to when the leakage current drops to 90% of the specified current. This shows the delay experienced before the current is transferred to the load.
tr : Rise Time
The rise time is the time it takes for the drain current to rise from 10% to 90%.
tf : Falling time
The fall time is the time it takes for the drain current to fall from 90% to 10%.
Post time: Apr-15-2024
