MOSFET original basic knowledge and application

As for why depletion mode MOSFETs are not used, it is not recommended to get to the bottom of it.

For these two enhancement-mode MOSFETs, NMOS is more commonly used. The reason is that the on-resistance is small and easy to manufacture. Therefore, NMOS is generally used in switching power supply and motor drive applications. In the following introduction, NMOS is mostly used.

There is a parasitic capacitance between the three pins of the MOSFET. This is not what we need, but is caused by manufacturing process limitations. The existence of parasitic capacitance makes it more troublesome when designing or selecting a drive circuit, but there is no way to avoid it. We will introduce it in detail later.

There is a parasitic diode between the drain and source. This is called the body diode. This diode is very important when driving inductive loads (such as motors). By the way, the body diode only exists in a single MOSFET and is usually not found inside an integrated circuit chip.

 

2. MOSFET conduction characteristics

Conducting means acting as a switch, which is equivalent to the switch being closed.

The characteristic of NMOS is that it will turn on when Vgs is greater than a certain value. It is suitable for use when the source is grounded (low-end drive), as long as the gate voltage reaches 4V or 10V.

The characteristics of PMOS are that it will turn on when Vgs is less than a certain value, which is suitable for situations where the source is connected to VCC (high-end drive). However, although PMOS can be easily used as a high-end driver, NMOS is usually used in high-end drivers due to large on-resistance, high price, and few replacement types.

 

3. MOS switch tube loss

Whether it is NMOS or PMOS, there is an on-resistance after it is turned on, so the current will consume energy on this resistance. This part of the energy consumed is called conduction loss. Choosing a MOSFET with a small on-resistance will reduce conduction losses. Today's low-power MOSFET on-resistance is generally around tens of milliohms, and there are also several milliohms.

When the MOSFET is turned on and off, it must not be completed instantly. The voltage across the MOS has a decreasing process, and the flowing current has an increasing process. During this period, the MOSFET's loss is the product of voltage and current, which is called switching loss. Usually switching losses are much larger than conduction losses, and the faster the switching frequency, the greater the losses.

The product of voltage and current at the moment of conduction is very large, causing great losses. Shortening the switching time can reduce the loss during each conduction; reducing the switching frequency can reduce the number of switches per unit time. Both methods can reduce switching losses.

The waveform when the MOSFET is turned on. It can be seen that the product of voltage and current at the moment of conduction is very large, and the loss caused is also very large. Reducing the switching time can reduce the loss during each conduction; reducing the switching frequency can reduce the number of switches per unit time. Both methods can reduce switching losses.

 

4. MOSFET driver

Compared with bipolar transistors, it is generally believed that no current is required to turn on a MOSFET, as long as the GS voltage is higher than a certain value. This is easy to do, but we also need speed.

It can be seen in the structure of the MOSFET that there is a parasitic capacitance between GS and GD, and the driving of the MOSFET is actually the charge and discharge of the capacitor. Charging the capacitor requires a current, because the capacitor can be regarded as a short circuit at the moment of charging, so the instantaneous current will be relatively large. The first thing to pay attention to when selecting/designing a MOSFET driver is the amount of instantaneous short-circuit current it can provide. ​

The second thing to note is that NMOS, which is commonly used for high-end driving, needs the gate voltage to be greater than the source voltage when turned on. When the high-side driven MOSFET is turned on, the source voltage is the same as the drain voltage (VCC), so the gate voltage is 4V or 10V greater than VCC at this time. If you want to get a voltage larger than VCC in the same system, you need a special boost circuit. Many motor drivers have integrated charge pumps. It should be noted that an appropriate external capacitor should be selected to obtain sufficient short-circuit current to drive the MOSFET.

 

The 4V or 10V mentioned above is the turn-on voltage of commonly used MOSFETs, and of course a certain margin needs to be allowed during design. And the higher the voltage, the faster the conduction speed and the smaller the conduction resistance. Now there are MOSFETs with smaller conduction voltages used in different fields, but in 12V automotive electronic systems, generally 4V conduction is enough.

 

For the MOSFET driver circuit and its losses, please refer to Microchip's AN799 Matching MOSFET Drivers to MOSFETs. It’s very detailed, so I won’t write more.

 

The product of voltage and current at the moment of conduction is very large, causing great losses. Reducing the switching time can reduce the loss during each conduction; reducing the switching frequency can reduce the number of switches per unit time. Both methods can reduce switching losses.

MOSFET is a type of FET (the other is JFET). It can be made into enhancement mode or depletion mode, P-channel or N-channel, a total of 4 types. However, only enhancement-mode N-channel MOSFET is actually used. and enhancement-type P-channel MOSFET, so NMOS or PMOS usually refer to these two types.

 

5. MOSFET application circuit?

The most significant characteristic of MOSFET is its good switching characteristics, so it is widely used in circuits that require electronic switches, such as switching power supplies and motor drives, as well as lighting dimming.

 

Today's MOSFET drivers have several special requirements:

1. Low voltage application

When using a 5V power supply, if a traditional totem pole structure is used at this time, since the transistor be has a voltage drop of about 0.7V, the actual final voltage applied to the gate is only 4.3V. At this time, we choose the nominal gate power

There is a certain risk when using a 4.5V MOSFET. The same problem also occurs when using 3V or other low-voltage power supplies.

2. Wide voltage application

The input voltage is not a fixed value, it will change with time or other factors. This change causes the driving voltage provided by the PWM circuit to the MOSFET to be unstable.

In order to make MOSFETs safe under high gate voltages, many MOSFETs have built-in voltage regulators to forcefully limit the amplitude of the gate voltage. In this case, when the provided driving voltage exceeds the voltage of the voltage regulator tube, it will cause large static power consumption.

At the same time, if you simply use the principle of resistor voltage division to reduce the gate voltage, the MOSFET will work well when the input voltage is relatively high, but when the input voltage is reduced, the gate voltage will be insufficient, causing incomplete conduction, thereby increasing power consumption.

3. Dual voltage application

In some control circuits, the logic part uses a typical 5V or 3.3V digital voltage, while the power part uses a voltage of 12V or even higher. The two voltages are connected to a common ground.

This raises a requirement to use a circuit so that the low-voltage side can effectively control the MOSFET on the high-voltage side. At the same time, the MOSFET on the high-voltage side will also face the problems mentioned in 1 and 2.

In these three cases, the totem pole structure cannot meet the output requirements, and many off-the-shelf MOSFET driver ICs do not seem to include gate voltage limiting structures.

 

So I designed a relatively general circuit to meet these three needs.

​

Driver circuit for NMOS

Here I will only do a simple analysis of the NMOS driver circuit:

Vl and Vh are the low-end and high-end power supplies respectively. The two voltages can be the same, but Vl should not exceed Vh.

Q1 and Q2 form an inverted totem pole to achieve isolation while ensuring that the two driver tubes Q3 and Q4 do not turn on at the same time.

R2 and R3 provide the PWM voltage reference. By changing this reference, the circuit can be operated in a position where the PWM signal waveform is relatively steep.

Q3 and Q4 are used to provide drive current. When turned on, Q3 and Q4 only have a minimum voltage drop of Vce relative to Vh and GND. This voltage drop is usually only about 0.3V, which is much lower than the Vce of 0.7V.

R5 and R6 are feedback resistors, used to sample the gate voltage. The sampled voltage generates a strong negative feedback to the bases of Q1 and Q2 through Q5, thus limiting the gate voltage to a limited value. This value can be adjusted through R5 and R6.

Finally, R1 provides the base current limit for Q3 and Q4, and R4 provides the gate current limit for the MOSFET, which is the limit of the Ice of Q3 and Q4. If necessary, an acceleration capacitor can be connected in parallel to R4.

This circuit provides the following features:

1. Use low-side voltage and PWM to drive the high-side MOSFET.

2. Use a small amplitude PWM signal to drive a MOSFET with high gate voltage requirements.

3. Peak limit of gate voltage

4. Input and output current limits

5. By using appropriate resistors, very low power consumption can be achieved.

6. The PWM signal is inverted. NMOS does not need this feature and can be solved by placing an inverter in front.

When designing portable devices and wireless products, improving product performance and extending battery life are two issues designers need to face. DC-DC converters have the advantages of high efficiency, large output current, and low quiescent current, making them very suitable for powering portable devices. At present, the main trends in the development of DC-DC converter design technology are: (1) High-frequency technology: As the switching frequency increases, the size of the switching converter is also reduced, the power density is also greatly increased, and the dynamic response is improved. . The switching frequency of low-power DC-DC converters will rise to the megahertz level. (2) Low output voltage technology: With the continuous development of semiconductor manufacturing technology, the operating voltage of microprocessors and portable electronic devices is getting lower and lower, which requires future DC-DC converters to provide low output voltage to adapt to microprocessors. requirements for processors and portable electronic devices.

The development of these technologies has put forward higher requirements for the design of power chip circuits. First of all, as the switching frequency continues to increase, high requirements are placed on the performance of switching elements. At the same time, corresponding switching element drive circuits must be provided to ensure that the switching elements work normally at switching frequencies up to MHz. Secondly, for battery-powered portable electronic devices, the working voltage of the circuit is low (taking lithium batteries as an example, the working voltage is 2.5~3.6V), therefore, the working voltage of the power chip is low.

 

MOSFET has very low on-resistance and consumes low energy. MOSFET is often used as a power switch in currently popular high-efficiency DC-DC chips. However, due to the large parasitic capacitance of MOSFET, the gate capacitance of NMOS switching tubes is generally as high as tens of picofarads. This puts forward higher requirements for the design of high operating frequency DC-DC converter switching tube drive circuit.

In low-voltage ULSI designs, there are a variety of CMOS and BiCMOS logic circuits using bootstrap boost structures and drive circuits as large capacitive loads. These circuits can operate normally with a power supply voltage lower than 1V, and can operate at a frequency of tens of megahertz or even hundreds of megahertz with a load capacitance of 1 to 2pF. This article uses a bootstrap boost circuit to design a drive circuit with large load capacitance drive capability that is suitable for low voltage, high switching frequency boost DC-DC converters. The circuit is designed based on Samsung AHP615 BiCMOS process and verified by Hspice simulation. When the supply voltage is 1.5V and the load capacitance is 60pF, the operating frequency can reach more than 5MHz.

​

MOSFET switching characteristics

​

1. Static characteristics

As a switching element, MOSFET also works in two states: off or on. Since MOSFET is a voltage-controlled component, its working state is mainly determined by the gate-source voltage uGS.

 

The working characteristics are as follows:

※ uGS＜turn-on voltage UT: MOSFET works in the cut-off area, the drain-source current iDS is basically 0, the output voltage uDS≈UDD, and the MOSFET is in the "off" state.

※ uGS>Turn-on voltage UT: MOSFET works in the conduction region, drain-source current iDS=UDD/(RD+rDS). Among them, rDS is the drain-source resistance when the MOSFET is turned on. The output voltage UDS=UDD?rDS/(RD+rDS), if rDS＜＜RD, uDS≈0V, the MOSFET is in the "on" state.

2. Dynamic characteristics

MOSFET also has a transition process when switching between on and off states, but its dynamic characteristics mainly depend on the time required to charge and discharge the stray capacitance related to the circuit, and the charge accumulation and discharge when the tube itself is on and off The dissipation time is very small.

When the input voltage ui changes from high to low and the MOSFET changes from the on state to the off state, the power supply UDD charges the stray capacitance CL through RD, and the charging time constant τ1=RDCL. Therefore, the output voltage uo needs to go through a certain delay before changing from low level to high level; when the input voltage ui changes from low to high and the MOSFET changes from the off state to the on state, the charge on the stray capacitance CL passes through rDS Discharge occurs with a discharge time constant τ2≈rDSCL. It can be seen that the output voltage Uo also needs a certain delay before it can transition to a low level. But because rDS is much smaller than RD, the conversion time from cut-off to conduction is shorter than the conversion time from conduction to cut-off.

Since the drain-source resistance rDS of the MOSFET when it is turned on is much larger than the saturation resistance rCES of the transistor, and the external drain resistance RD is also larger than the collector resistance RC of the transistor, the charging and discharging time of the MOSFET is longer, making the MOSFET The switching speed is lower than that of a transistor. However, in CMOS circuits, since the charging circuit and the discharging circuit are both low-resistance circuits, the charging and discharging processes are relatively fast, resulting in a high switching speed for the CMOS circuit.